Create a directory named sopc_led_bf, and under that directory create a project named
sopc_led_bf. Run SOPC Builder and the system name is nois. The following screen capture
should be nois.

Instruction cache size 4Kbytes.

Add tri-state bus bridge. Flash connects to bus through the bridge while SDRAM connector
connects directly to the bus.

Add SDRAM:

For the V5 board, the setting is as follows:

Timing tab can use the default setting.

Add Flash:

Setting is as following:

Connect the flash controller to the tristate bus bridge by clicking the cross point between
tristate_bridge->tristate_master and cfi_flash->s1. The solid black dot means they are
connected.

Next steps are to add EPCS Serial Flash Controller and System ID Peripheral.

Add a 4-bit output PIO, and rename to pio_led.

Double click CPU to set “Reset Vector” and “Exception Vector”.

“Reset Vector”: Cfi_Flash. If the firmware is going to be downloaded to CFI_FLASH, the Reset
Vector must be set to cfi_flash. Reset vector determines where the flash programmer is going to
download to. If selecting EPCS controller, the flash programmer is going to download the
firmware to EPCS. EPCS configuration chip is a type of serial flash chip. It can not only store the
FPGA configuration information, it can also store user data, code, and NiosII code code, just like
CFI_flash. It is required to add EPCS controller if this type of application is needed.

Next steps are to automatically assign base address and automatically assign IRQ.

Click system generation to generate the system.

Add the built system into QuartusII project.

Add PLL module: The clock of SDRAM is 50MHz. Because the CPU has instruction cache, the
clock of SDRAM and clock of CPU must be same, and the clock of SDRAM needs to have a -72
degree phase shift from the clock of CPU.

Connecting all blocks as following:

Assign the pins using tcl file:

#Setup.tcl 
# Setup pin setting for EP2C5_EP2C8 main board 
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED" 
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT OFF 
set_location_assignment PIN_23 -to clk 
set_location_assignment PIN_56 -to reset 
 
#beep 
set_location_assignment PIN_152 -to beep

#led 
set_location_assignment PIN_6 -to led\[0\] 
set_location_assignment PIN_5 -to led\[1\] 
set_location_assignment PIN_3 -to led\[2\] 
set_location_assignment PIN_4 -to led\[3\] 
 
#RTL8019 
set_location_assignment PIN_150 -to rtl8019_cs 
set_location_assignment PIN_151 -to RTL8019_INT 
set_location_assignment PIN_164 -to RTL8019_RST 
#FLASH 
set_location_assignment PIN_201 -to FLASH_CE 
#set_location_assignment PIN_168 -to tri_read_n 
#set_location_assignment PIN_165 -to tri_wtite_n 
set_location_assignment PIN_168 -to FLASH_OE 
set_location_assignment PIN_165 -to FLASH_WE

set_location_assignment PIN_181 -to FLASH_ADDR\[0\] 
set_location_assignment PIN_193 -to FLASH_ADDR\[1\] 
set_location_assignment PIN_192 -to FLASH_ADDR\[2\] 
set_location_assignment PIN_191 -to FLASH_ADDR\[3\] 
set_location_assignment PIN_189 -to FLASH_ADDR\[4\]
set_location_assignment PIN_188 -to FLASH_ADDR\[5\] 
set_location_assignment PIN_187 -to FLASH_ADDR\[6\] 
set_location_assignment PIN_185 -to FLASH_ADDR\[7\] 
set_location_assignment PIN_197 -to FLASH_ADDR\[8\] 
set_location_assignment PIN_195 -to FLASH_ADDR\[9\] 
set_location_assignment PIN_199 -to FLASH_ADDR\[10\] 
set_location_assignment PIN_198 -to FLASH_ADDR\[11\] 
set_location_assignment PIN_200 -to FLASH_ADDR\[12\] 
set_location_assignment PIN_205 -to FLASH_ADDR\[13\] 
set_location_assignment PIN_203 -to FLASH_ADDR\[14\] 
set_location_assignment PIN_207 -to FLASH_ADDR\[15\] 
set_location_assignment PIN_206 -to FLASH_ADDR\[16\] 
set_location_assignment PIN_208 -to FLASH_ADDR\[17\] 
set_location_assignment PIN_14 -to FLASH_ADDR\[18\] 
set_location_assignment PIN_13 -to FLASH_ADDR\[19\] 
set_location_assignment PIN_12 -to FLASH_ADDR\[20\] 
set_location_assignment PIN_11 -to FLASH_ADDR\[21\] 
set_location_assignment PIN_10 -to FLASH_ADDR\[22\] 

set_location_assignment PIN_180 -to FLASH_DQ\[0\] 
set_location_assignment PIN_179 -to FLASH_DQ\[1\] 
set_location_assignment PIN_176 -to FLASH_DQ\[2\] 
set_location_assignment PIN_175 -to FLASH_DQ\[3\] 
set_location_assignment PIN_173 -to FLASH_DQ\[4\] 
set_location_assignment PIN_171 -to FLASH_DQ\[5\] 
set_location_assignment PIN_170 -to FLASH_DQ\[6\] 
set_location_assignment PIN_169 -to FLASH_DQ\[7\] 


#SDRAM 
set_location_assignment PIN_31 -to sd_data\[0\] 
set_location_assignment PIN_30 -to sd_data\[1\] 
set_location_assignment PIN_33 -to sd_data\[2\] 
set_location_assignment PIN_35 -to sd_data\[3\] 
set_location_assignment PIN_34 -to sd_data\[4\] 
set_location_assignment PIN_37 -to sd_data\[5\] 
set_location_assignment PIN_39 -to sd_data\[6\] 
set_location_assignment PIN_41 -to sd_data\[7\] 
set_location_assignment PIN_77 -to sd_data\[8\] 
set_location_assignment PIN_60 -to sd_data\[9\] 
set_location_assignment PIN_59 -to sd_data\[10\] 
set_location_assignment PIN_58 -to sd_data\[11\] 
set_location_assignment PIN_57 -to sd_data\[12\] 
set_location_assignment PIN_45 -to sd_data\[13\] 
set_location_assignment PIN_48 -to sd_data\[14\] 
set_location_assignment PIN_47 -to sd_data\[15\] 

set_location_assignment PIN_82 -to sd_addr\[0\] 
set_location_assignment PIN_86 -to sd_addr\[1\] 
set_location_assignment PIN_88 -to sd_addr\[2\] 
set_location_assignment PIN_87 -to sd_addr\[3\] 
set_location_assignment PIN_70 -to sd_addr\[4\] 
set_location_assignment PIN_69 -to sd_addr\[5\] 
set_location_assignment PIN_68 -to sd_addr\[6\] 
set_location_assignment PIN_67 -to sd_addr\[7\] 
set_location_assignment PIN_72 -to sd_addr\[8\] 
set_location_assignment PIN_75 -to sd_addr\[9\] 
set_location_assignment PIN_84 -to sd_addr\[10\] 
set_location_assignment PIN_74 -to sd_addr\[11\] 

set_location_assignment PIN_81 -to sd_ba\[0\] 
set_location_assignment PIN_80 -to sd_ba\[1\] 

set_location_assignment PIN_40 -to sd_dqm\[0\] 
set_location_assignment PIN_61 -to sd_dqm\[1\] 

set_location_assignment PIN_76 -to sd_cs 
set_location_assignment PIN_46 -to sd_ras 
set_location_assignment PIN_43 -to sd_cas 
set_location_assignment PIN_44 -to sd_we 
set_location_assignment PIN_63 -to sd_cke 
set_location_assignment PIN_64 -to sd_clk 

Click Compilation to compile:

Download sof file to FPGA:

For SOF file:

For POF file:

Firmware Project:

The firmware project is done same as the previous SOPC_LED project except that link script
should use sdram instead if onchip-mem.

Click “Program Flash” to download to flash.